ESPixelStick Firmware
Firmware for the ESPixelStick
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GPIO_Defs_ESP32_Bong69.hpp
Go to the documentation of this file.
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#pragma once
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/*
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* GPIO_Defs_ESP32_Bongo69.hpp - Output Management class
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*
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* Project: ESPixelStick - An ESP8266 / ESP32 and E1.31 based pixel driver
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* Copyright (c) 2021 Shelby Merrick
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* http://www.forkineye.com
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*
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* This program is provided free for you to use in any way that you wish,
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* subject to the laws and regulations where you are using it. Due diligence
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* is strongly suggested before using this code. Please give credit where due.
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*
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* The Author makes no warranty of any kind, express or implied, with regard
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* to this program or the documentation contained in this document. The
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* Author shall not be liable in any event for incidental or consequential
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* damages in connection with, or arising out of, the furnishing, performance
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* or use of these programs.
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*
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*/
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#define SUPPORT_ETHERNET
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//Output Manager
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#define DEFAULT_RMT_0_GPIO gpio_num_t::GPIO_NUM_1
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#define DEFAULT_RMT_1_GPIO gpio_num_t::GPIO_NUM_2
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#define DEFAULT_RMT_2_GPIO gpio_num_t::GPIO_NUM_3
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#define DEFAULT_RMT_3_GPIO gpio_num_t::GPIO_NUM_4
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#define DEFAULT_RMT_4_GPIO gpio_num_t::GPIO_NUM_5
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#define DEFAULT_RMT_5_GPIO gpio_num_t::GPIO_NUM_12
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#define DEFAULT_RMT_6_GPIO gpio_num_t::GPIO_NUM_14
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#define DEFAULT_RMT_7_GPIO gpio_num_t::GPIO_NUM_15
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// # define SUPPORT_SPI_OUTPUT
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// #define DEFAULT_SPI_DATA_GPIO gpio_num_t::GPIO_NUM_15
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// #define DEFAULT_SPI_CLOCK_GPIO gpio_num_t::GPIO_NUM_25
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#define DEFAULT_I2C_SDA gpio_num_t::GPIO_NUM_21
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#define DEFAULT_I2C_SCL gpio_num_t::GPIO_NUM_22
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// File Manager
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// #define SUPPORT_SD
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#define SD_CARD_MISO_PIN gpio_num_t::GPIO_NUM_12
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#define SD_CARD_MOSI_PIN gpio_num_t::GPIO_NUM_13
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#define SD_CARD_CLK_PIN gpio_num_t::GPIO_NUM_14
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#define SD_CARD_CS_PIN gpio_num_t::GPIO_NUM_15
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#include <ETH.h>
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/*
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* ETH_CLOCK_GPIO0_IN - default: external clock from crystal oscillator
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* ETH_CLOCK_GPIO0_OUT - 50MHz clock from internal APLL output on GPIO0 - possibly an inverter is needed for LAN8720
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* ETH_CLOCK_GPIO16_OUT - 50MHz clock from internal APLL output on GPIO16 - possibly an inverter is needed for LAN8720
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* ETH_CLOCK_GPIO17_OUT - 50MHz clock from internal APLL inverted output on GPIO17 - tested with LAN8720
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*/
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#define DEFAULT_ETH_CLK_MODE eth_clock_mode_t::ETH_CLOCK_GPIO17_OUT
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// Pin# of the enable signal for the external crystal oscillator (-1 to disable for internal APLL source)
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#define DEFAULT_ETH_POWER_PIN gpio_num_t::GPIO_NUM_16
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#define ETH_POWER_PIN DEFAULT_ETH_POWER_PIN
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#define DEFAULT_ETH_POWER_PIN_ACTIVE HIGH
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// Type of the Ethernet PHY (LAN8720 or TLK110)
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#define DEFAULT_ETH_TYPE eth_phy_type_t::ETH_PHY_LAN8720
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// I2C-address of Ethernet PHY (0 or 1 for LAN8720, 31 for TLK110)
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#define ETH_ADDR_PHY_LAN8720 1
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#define DEFAULT_ETH_ADDR ETH_ADDR_PHY_LAN8720
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#define DEFAULT_ETH_TXEN gpio_num_t::GPIO_NUM_21
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#define DEFAULT_ETH_TXD0 gpio_num_t::GPIO_NUM_19
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#define DEFAULT_ETH_TXD1 gpio_num_t::GPIO_NUM_22
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#define DEFAULT_ETH_CRSDV gpio_num_t::GPIO_NUM_27
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#define DEFAULT_ETH_RXD0 gpio_num_t::GPIO_NUM_25
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#define DEFAULT_ETH_RXD1 gpio_num_t::GPIO_NUM_26
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#define DEFAULT_ETH_MDC_PIN gpio_num_t::GPIO_NUM_23
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#define DEFAULT_ETH_MDIO_PIN gpio_num_t::GPIO_NUM_18
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// Output Types
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// Not Finished - #define SUPPORT_OutputType_TLS3001
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// #define SUPPORT_OutputType_APA102 // SPI
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#define SUPPORT_OutputType_DMX
// UART
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#define SUPPORT_OutputType_GECE
// UART
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#define SUPPORT_OutputType_GS8208
// UART / RMT
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#define SUPPORT_OutputType_Renard
// UART
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#define SUPPORT_OutputType_Serial
// UART
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#define SUPPORT_OutputType_TM1814
// UART / RMT
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#define SUPPORT_OutputType_UCS1903
// UART / RMT
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#define SUPPORT_OutputType_UCS8903
// UART / RMT
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// #define SUPPORT_OutputType_WS2801 // SPI
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#define SUPPORT_OutputType_WS2811
// UART / RMT
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#define SUPPORT_OutputType_Relay
// GPIO
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// #define SUPPORT_OutputType_Servo_PCA9685 // I2C (default pins)
include
platforms
GPIO_Defs_ESP32_Bong69.hpp
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